Subtracts source operand to destination operand. Result is stored to destination's place.
----------------------------------------------------------------- |15 |14 |13 |12 |11 |10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |---|---|---|---|-----------|-----------|-----------|-----------| | 1 | 0 | 0 | 1 | REGISTER | OP-MODE | MODE | REGISTER | ----------------------------------------========================= <ea> OP-MODE Byte Word Long ~~~~ ~~~~ ~~~~ 000 001 010 (Dn) - (<ea>) -> Dn 100 101 110 (<ea>) - (Dn) -> <ea> REGISTER One of the 8 data registers If <ea> is source, allowed addressing modes are: --------------------------------- ------------------------------- |Addressing Mode|Mode| Register | |Addressing Mode|Mode|Register| |-------------------------------| |-----------------------------| | Dn |000 |No reg. Dn| | (Abs).W |111 | 000 | |-------------------------------| |-----------------------------| | An * |001 |No reg. An| | (Abs).L |111 | 001 | |-------------------------------| |-----------------------------| | (An) |010 |No reg. An| | (d16,PC) |111 | 010 | |-------------------------------| |-----------------------------| | (An)+ |011 |No reg. An| | (d8,PC,Xi) |111 | 011 | |-------------------------------| |-----------------------------| | -(An) |100 |No reg. An| | (bd,PC,Xi) |111 | 011 | |-------------------------------| |-----------------------------| | (d16,An) |101 |No reg. An| |([bd,PC,Xi],od)|111 | 011 | |-------------------------------| |-----------------------------| | (d8,An,Xi) |110 |No reg. An| |([bd,PC],Xi,od)|111 | 011 | |-------------------------------| |-----------------------------| | (bd,An,Xi) |110 |No reg. An| | #data |111 | 100 | |-------------------------------| ------------------------------- |([bd,An,Xi],od)|110 |No reg. An| |-------------------------------| |([bd,An],Xi,od)|110 |No reg. An| --------------------------------- * Word or Long only If <ea> is destination, allowed addressing modes are: --------------------------------- ------------------------------- |Addressing Mode|Mode| Register | |Addressing Mode|Mode|Register| |-------------------------------| |-----------------------------| | Dn | - | - | | (Abs).W |111 | 000 | |-------------------------------| |-----------------------------| | An | - | - | | (Abs).L |111 | 001 | |-------------------------------| |-----------------------------| | (An) |010 |No reg. An| | (d16,PC) | - | - | |-------------------------------| |-----------------------------| | (An)+ |011 |No reg. An| | (d8,PC,Xi) | - | - | |-------------------------------| |-----------------------------| | -(An) |100 |No reg. An| | (bd,PC,Xi) | - | - | |-------------------------------| |-----------------------------| | (d16,An) |101 |No reg. An| |([bd,PC,Xi],od)| - | - | |-------------------------------| |-----------------------------| | (d8,An,Xi) |110 |No reg. An| |([bd,PC],Xi,od)| - | - | |-------------------------------| |-----------------------------| | (bd,An,Xi) |110 |No reg. An| | #data | - | - | |-------------------------------| ------------------------------- |([bd,An,Xi],od)|110 |No reg. An| |-------------------------------| |([bd,An],Xi,od)|110 |No reg. An| --------------------------------- When destination is an Address Register, SUBA instruction is used.
X - Set the same as the carry bit. N - Set if the result is negative. Cleared otherwise. Z - Set if the result is zero. Cleared otherwise. V - Set if an overflow is generated. Cleared otherwise. C - Set if a carry is generated. Cleared otherwise.