Registers in the register list are either moved to or fetched from consecutive memory locations at the specified address. Data can be either word or long word, but if the register list is destination and the size is word, each register is filled with the source word sign extended to 32-bits.
Also, in the case that the register list is the destination, register indirect with predecrement is not a valid source mode. If the register list is the source, then the destination may not be register indirect with postincrement.
MOVEM.L D0/D1/A0,(A2)+ ;invalid MOVEM.W -(A1),D5/D7/A4 ;invalid
The register list is accessed with D0 first through D7, followed by A0 through A7.
<ea> -----------------------------------------========================= |15 |14 |13 |12 |11 |10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |---|---|---|---|---|---|---|---|---|----|-----------|-----------| | 0 | 1 | 0 | 0 | 1 |dr | 0 | 0 | 1 |SIZE| MODE | REGISTER | |----------------------------------------------------------------| | MASK FROM REGISTER LIST | ------------------------------------------------------------------ dr specifies move direction: 0->registers to memory 1->memory to registers MASK FROM REGISTER LIST specifies registers which must be moved and indicates their move order. For pre-decrementing, mask has the following format: ----------------------------------------------------------------- |15 |14 |13 |12 |11 |10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---| |D0 |D1 |D2 |D3 |D4 |D5 |D6 |D7 |A0 |A1 |A2 |A3 |A4 |A5 |A6 |A7 | ------------------------------------------------------------===== | First register to be moved------------------------------------' For post-incrementing, mask has the following format: ----------------------------------------------------------------- |15 |14 |13 |12 |11 |10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---| |A7 |A6 |A5 |A4 |A3 |A2 |A1 |A0 |D7 |D6 |D5 |D4 |D3 |D2 |D1 |D0 | ------------------------------------------------------------===== | First register to be moved------------------------------------' SIZE 0->16 bits. 1->32 bits. REGISTER <ea> specifies memory address of move. Move from registers to memory, addressing modes allowed are: --------------------------------- ------------------------------- |Addressing Mode|Mode| Register | |Addressing Mode|Mode|Register| |-------------------------------| |-----------------------------| | Dn | - | - | | (Abs).W |111 | 000 | |-------------------------------| |-----------------------------| | An | - | - | | (Abs).L |111 | 001 | |-------------------------------| |-----------------------------| | (An) |010 |No reg. An| | (d16,PC) | - | - | |-------------------------------| |-----------------------------| | (An)+ | - | - | | (d8,PC,Xi) | - | - | |-------------------------------| |-----------------------------| | -(An) |100 |No reg. An| | (bd,PC,Xi) | - | - | |-------------------------------| |-----------------------------| | (d16,An) |101 |No reg. An| |([bd,PC,Xi],od)| - | - | |-------------------------------| |-----------------------------| | (d8,An,Xi) |110 |No reg. An| |([bd,PC],Xi,od)| - | - | |-------------------------------| |-----------------------------| | (bd,An,Xi) |110 |No reg. An| | #data | - | - | |-------------------------------| ------------------------------- |([bd,An,Xi],od)|110 |No reg. An| |-------------------------------| |([bd,An],Xi,od)|110 |No reg. An| --------------------------------- Move from memory to registers, addressing modes allowed are: --------------------------------- ------------------------------- |Addressing Mode|Mode| Register | |Addressing Mode|Mode|Register| |-------------------------------| |-----------------------------| | Dn | - | - | | (Abs).W |111 | 000 | |-------------------------------| |-----------------------------| | An | - | - | | (Abs).L |111 | 001 | |-------------------------------| |-----------------------------| | (An) |010 |No reg. An| | (d16,PC) |111 | 010 | |-------------------------------| |-----------------------------| | (An)+ | - | - | | (d8,PC,Xi) |111 | 011 | |-------------------------------| |-----------------------------| | -(An) |100 |No reg. An| | (bd,PC,Xi) |111 | 011 | |-------------------------------| |-----------------------------| | (d16,An) |101 |No reg. An| |([bd,PC,Xi],od)|111 | 011 | |-------------------------------| |-----------------------------| | (d8,An,Xi) |110 |No reg. An| |([bd,PC],Xi,od)|111 | 011 | |-------------------------------| |-----------------------------| | (bd,An,Xi) |110 |No reg. An| | #data | - | - | |-------------------------------| ------------------------------- |([bd,An,Xi],od)|110 |No reg. An| |-------------------------------| |([bd,An],Xi,od)|110 |No reg. An| ---------------------------------