56. Cache PUSH and invalidate

56.1. Name

CPUSHA, CPUSHL, CPUSHP -- Push and invalidate cache lines

56.2. Synopsis

        CPUSHL        <caches>,(An)
        CPUSHP        <caches>,(An)
        CPUSHA        <caches>

        <caches> specifies the caches - NC = no cache
                                        DC = data cache
                                        IC = instruction cache
                                        BC = both caches

        Unsized

56.3. Function

Pushes and then invalidates selected cache lines. Any combination of caches can be specified. When the data cache is specified, the selected cache lines are first pushed to memory if they contain dirty data and then invalidated. Selected instruction cache lines are invalidated. Ways of selection are:

  • CPUSHL pushes and invalidates the cache line (if any) matching the physical address in the specified address register.

  • CPUSHP pushes and invalidates the cache lines (if any) matching the physical memory page in the specified address register.

  • CPUSHA pushes and invalidates all cache entries.

56.4. Format

        -----------------------------------------------------------------
        |15 |14 |13 |12 |11 |10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
        |---|---|---|---|-----------|---|---|---|---|---|---|-----------|
        | 1 | 1 | 1 | 1 | 0 | 1 | 0 | 0 | CACHE | 1 | SCOPE | REGISTER  |
        -----------------------------------------------------------------

        CACHE:  00 - No Operation          NC
                01 - Data Cache            DC
                10 - Instruction Cache     IC
                11 - Both Caches           BC

        SCOPE:  00 - Illegal
                01 - Line                  L
                10 - Page                  P
                11 - All                   A

56.5. Result

        None

56.6. See also

CINV