Adds the source operand to the destination operand along with the extend bit, and stores the result in the destination location. The addition is performed using binary coded decimal arithmetic. The operands, which are packed BCD numbers, can be addressed in two different ways:
Data register to data register: The operands are contained in the data registers specified in the instruction.
Memory to memory: The operands are addressed with the predecrement addressing mode using the address registers specified in the instruction.
This operation is a byte operation only.
Normally the Z condition code bit is set via programming before the start of an operation. That allows successful tests for zero results upon completion of multiple-precision operations.
----------------------------------------------------------------- |15 |14 |13 |12 |11 |10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |---|---|---|---|-----------|---|---|---|---|---|---|-----------| | 1 | 1 | 0 | 0 | Rx | 1 | 0 | 0 | 0 | 0 |R/M| Ry | ----------------------------------------------------------------- R/M = 0 -> data register R/M = 1 -> address register Rx: destination register Ry: source register
X - Set the same as the carry bit. N - Undefined Z - Cleared if the result is non-zero. Unchanged otherwise. V - Undefined C - Set if a decimal carry was generated. Cleared otherwise.