20. ADD 3-bit immediate Quick

20.1. Name

ADDQ -- Add 3-bit immediate quick

20.2. Synopsis

        ADDQ        #<data>,<ea>

        Size = (Byte, Word, Long)

20.3. Function

Adds the immediate value of 1 to 8 to the operand at the destination location. The size of the operation may be specified as byte, word, or long. When adding to address registers, the condition codes are not altered, and the entire destination address register is used regardless of the operation size.

20.4. Format

        -----------------------------------------------------------------
        |15 |14 |13 |12 |11 |10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
        |---|---|---|---|-----------|---|-------|-----------|-----------|
        | 0 | 1 | 0 | 1 |    DATA   | 0 | SIZE  |    MODE   |  REGISTER |
        ----------------------------------------=========================
                                                          <ea>

DATA
        000        ->represent value 8
        001 to 111 ->immediate data from 1 to 7

SIZE
        00->one Byte operation
        01->one Word operation
        10->one Long operation

REGISTER
        <ea> is always destination, addressing modes are the followings:

        --------------------------------- -------------------------------
        |Addressing Mode|Mode| Register | |Addressing Mode|Mode|Register|
        |-------------------------------| |-----------------------------|
        |      Dn       |000 |No reg. Dn| |   (Abs).W     |111 |  000   |
        |-------------------------------| |-----------------------------|
        |      An *     |001 |No reg. An| |   (Abs).L     |111 |  001   |
        |-------------------------------| |-----------------------------|
        |     (An)      |010 |No reg. An| |   (d16,PC)    | -  |   -    |
        |-------------------------------| |-----------------------------|
        |     (An)+     |011 |No reg. An| |   (d8,PC,Xi)  | -  |   -    |
        |-------------------------------| |-----------------------------|
        |    -(An)      |100 |No reg. An| |   (bd,PC,Xi)  | -  |   -    |
        |-------------------------------| |-----------------------------|
        |    (d16,An)   |101 |No reg. An| |([bd,PC,Xi],od)| -  |   -    |
        |-------------------------------| |-----------------------------|
        |   (d8,An,Xi)  |110 |No reg. An| |([bd,PC],Xi,od)| -  |   -    |
        |-------------------------------| |-----------------------------|
        |   (bd,An,Xi)  |110 |No reg. An| |    #data      | -  |   -    |
        |-------------------------------| -------------------------------
        |([bd,An,Xi],od)|110 |No reg. An|
        |-------------------------------|
        |([bd,An],Xi,od)|110 |No reg. An|
        ---------------------------------
         * Word or Long only.

20.5. Result

        X - Set the same as the carry bit.
        N - Set if the result is negative. Cleared otherwise.
        Z - Set if the result is zero. Cleared otherwise.
        V - Set if an overflow is generated. Cleared otherwise.
        C - Set if a carry is generated. Cleared otherwise.

20.6. See also

ADD ADDI SUB SUBI SUBQ